1. Field of the Invention
Example embodiments relate to a stacked semiconductor package, and more specifically, to the shape of a unit package to electrically connect an upper unit package to a lower unit package.
2. Description of the Related Art
Recently, as the miniaturization of semiconductor products accelerates, the miniaturization of semiconductor packages as well as high integration of semiconductor chips is becoming necessary. For the miniaturization of the semiconductor packages, a stacked semiconductor package in which a plurality of packages is stacked has been developed.
As a specific example of the stacked semiconductor package, there is provided a stacked semiconductor package having a ball grid array (BGA) package positioned at the lower part thereof and another BGA package stacked on the BGA package.
In such a package, solder balls of the upper BGA package are mounted on the lower BGA package so as to be electrically connected.
However, for the electrical connection between the upper BGA package and the lower BGA package, separate bump regions or solder ball regions, on which the solder balls of the upper BGA package are to be mounted, need to be formed on the lower BGA package.